Adoption of OPC and the impact on design and layout
Proceedings of the 38th annual Design Automation Conference
Layout impact of resolution enhancement techniques: impediment or opportunity?
Proceedings of the 2003 international symposium on Physical design
Toward a methodology for manufacturability-driven design rule exploration
Proceedings of the 41st annual Design Automation Conference
Manufacturing-Aware Physical Design
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
The impact of the nanoscale on computing systems
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Pattern sensitive placement for manufacturability
Proceedings of the 2007 international symposium on Physical design
Detailed placement for leakage reduction using systematic through-pitch variation
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction
Proceedings of the 45th annual Design Automation Conference
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Impact of lithography-friendly circuit layout
Proceedings of the 19th ACM Great Lakes symposium on VLSI
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 2009 International Conference on Computer-Aided Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SAT based multi-net rip-up-and-reroute for manufacturing hotspot removal
Proceedings of the Conference on Design, Automation and Test in Europe
Pattern sensitive placement perturbation for manufacturability
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Sub-resolution assist features (SRAFs) provide an absolutely essential technique for critical dimension (CD) control and process window enhancement in subwavelength lithography. However, as focus levels change during manufacturing, CDs at a given "legal" pitch can fail to achieve manufacturing tolerances required for adequate yield. Furthermore, adoption of off-axis illumination (OAI) and SRAF techniques to enhance resolution at minimum pitch worsens printability of patterns at other pitches. This paper describes a novel dynamic programming-based technique for Assist-Feature Correctness (AFCorr) in detailed placement of standard-cell designs. For benchmark designs in 130nm and 90nm technologies, AFCorr achieves improved depth of focus and substantial improvement in CD control with negligible timing, area, or CPU overhead. The advantages of AFCorr are expected to increase in future technology nodes.