MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Advanced compiler design and implementation
Advanced compiler design and implementation
Enhanced code compression for embedded RISC processors
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors
Proceedings of the 38th annual Design Automation Conference
Hard real-time scheduling for low-energy using stochastic data and DVS processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Real-time dynamic voltage scaling for low-power embedded operating systems
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
Analyzing and compressing assembly code
SIGPLAN '84 Proceedings of the 1984 SIGPLAN symposium on Compiler construction
Cycle-accurate energy measurement and characterization with a case study of the ARM7TDMI
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Profile guided selection of ARM and thumb instructions
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
ARM System Architecture
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Power optimization of real-time embedded systems on variable speed processors
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Optimal voltage allocation techniques for dynamically variable voltage processors
Proceedings of the 40th annual Design Automation Conference
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Practical Voltage-Scaling for Fixed-Priority RT-Systems
RTAS '03 Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
Maximizing the System Value while Satisfying Time and Energy Constraints
RTSS '02 Proceedings of the 23rd IEEE Real-Time Systems Symposium
Communications of the ACM - Program compaction
Dynamic voltage scaling algorithm for fixed-priority real-time systems using work-demand analysis
Proceedings of the 2003 international symposium on Low power electronics and design
Proceedings of the conference on Design, automation and test in Europe
FAST: Frequency-Aware Static Timing Analysis
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
Tuning the WCET of Embedded Applications
RTAS '04 Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Robust and sustainable schedulability analysis of embedded software
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
DIME: time-aware dynamic binary instrumentation using rate-based resource allocation
Proceedings of the Eleventh ACM International Conference on Embedded Software
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Real-time embedded systems are typically constrained in terms of three system performance criteria: space, time, and energy. The performance requirements are directly translated into constraints imposed on the system's resources, such as code size, execution time, and energy consumption. These resource constraints often interact or even conflict with each other in a complex manner, making it difficult for a system developer to apply a well-defined design methodology in developing a real-time embedded system. Motivated by this observation, we propose a design framework that can flexibly balance the tradeoff involving the system's code size, execution time, and energy consumption. Given a system specification and an optimization criteria, the proposed technique generates a set of design parameters in such a way that a system cost function is minimized while the given resource constraints are satisfied. Specifically, the technique derives code generation decision for each task so that a specific version of code is selected among a number of different ones that have distinct characteristics in terms of code size and execution time. In addition, the design framework determines the voltage/frequency setting for a variable voltage processor whose supply voltage can be adjusted at runtime in order to minimize the energy consumption while execution performance is degraded accordingly. The proposed technique formulates this design process as a constrained optimization problem. We show that this optimization problem is NP-hard and then provide a heuristic solution to it. We show that these seemingly conflicting design goals can be pursued by using a simple optimization algorithm that works with a single optimization criteria. Moreover, the optimization is driven by an abstract system specification given by the system developer, so that the system development process can be automated. The results from our simulation show that the proposed algorithm finds a solution that is close to the optimal one with the average error smaller than 1.0&percent;.