Multicast parallel pipeline router architecture for network-on-chip

  • Authors:
  • Faizal A. Samman;Thomas Hollstein;Manfred Glesner

  • Affiliations:
  • Technische Universität Darmstadt, Hessen;Technische Universität Darmstadt, Hessen;Technische Universität Darmstadt, Hessen

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 2008

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Abstract

This paper presents a flexible mesh router architecture using synchronous parallel pipeline worm-switching supporting unicast and multicast services. A very flexible mechanism to manage broadcast-flow to share the communication link in on-chip network is proposed. The proposed machanism guarantees, that all flits in multicast packets can be accepted in their multiple destination nodes. Our Network-on-Chip (NoC) is implemented based on modular synthesizable VHDL objects. The Architecture is flexible to design new NoC prototypes. Area overhead to update the NoC from unicast to multicast with the same routing algorithm is only about 15%.