A generic architecture for on-chip packet-switched interconnections
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
Interconnection Networks: An Engineering Approach
Interconnection Networks: An Engineering Approach
Networks on chip
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Connection-oriented Multicasting in Wormhole-switched Networks on Chip
ISVLSI '06 Proceedings of the IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures
Deadlock-free routing and component placement for irregular mesh-based networks-on-chip
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Communication modeling of multicast in all-port wormhole-routed NoCs
Journal of Systems and Software
An analytical model of broadcast in QoS-aware wormhole-routed NoCs
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VBON: Toward efficient on-chip networks via hierarchical virtual bus
Microprocessors & Microsystems
Microprocessors & Microsystems
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This paper presents a flexible mesh router architecture using synchronous parallel pipeline worm-switching supporting unicast and multicast services. A very flexible mechanism to manage broadcast-flow to share the communication link in on-chip network is proposed. The proposed machanism guarantees, that all flits in multicast packets can be accepted in their multiple destination nodes. Our Network-on-Chip (NoC) is implemented based on modular synthesizable VHDL objects. The Architecture is flexible to design new NoC prototypes. Area overhead to update the NoC from unicast to multicast with the same routing algorithm is only about 15%.