ElectroMagnetic Analysis (EMA): Measures and Counter-Measures for Smart Cards
E-SMART '01 Proceedings of the International Conference on Research in Smart Cards: Smart Card Programming and Security
IPA: A New Class of Power Attacks
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Security on FPGAs: State-of-the-art implementations and attacks
ACM Transactions on Embedded Computing Systems (TECS)
Power and electromagnetic analysis: improved model, consequences and comparisons
Integration, the VLSI Journal - Special issue: Embedded cryptographic hardware
A fast pipelined multi-mode DES architecture operating in IP representation
Integration, the VLSI Journal
Investigations of power analysis attacks on smartcards
WOST'99 Proceedings of the USENIX Workshop on Smartcard Technology on USENIX Workshop on Smartcard Technology
Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs
SSIRI '08 Proceedings of the 2008 Second International Conference on Secure System Integration and Reliability Improvement
Silicon-level Solutions to Counteract Passive and Active Attacks
FDTC '08 Proceedings of the 2008 5th Workshop on Fault Diagnosis and Tolerance in Cryptography
A wireless covert channel on smart cards (short paper)
ICICS'06 Proceedings of the 8th international conference on Information and Communications Security
Template attacks in principal subspaces
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Optically enhanced position-locked power analysis
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
A proposition for correlation power analysis enhancement
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
High-resolution side-channel attack using phase-based waveform matching
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Improved higher-order side-channel attacks with FPGA experiments
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Modeling time domain magnetic emissions of ICs
PATMOS'10 Proceedings of the 20th international conference on Integrated circuit and system design: power and timing modeling, optimization and simulation
Side-channel analysis of PUFs and fuzzy extractors
TRUST'11 Proceedings of the 4th international conference on Trust and trustworthy computing
Semi-invasive EM attack on FPGA RO PUFs and countermeasures
WESS '11 Proceedings of the Workshop on Embedded Systems Security
Localized electromagnetic analysis of cryptographic implementations
CT-RSA'12 Proceedings of the 12th conference on Topics in Cryptology
Towards different flavors of combined side channel attacks
CT-RSA'12 Proceedings of the 12th conference on Topics in Cryptology
Blind cartography for side channel attacks: cross-correlation cartography
International Journal of Reconfigurable Computing - Special issue on Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10)
CARDIS'12 Proceedings of the 11th international conference on Smart Card Research and Advanced Applications
Amplitude demodulation-based EM analysis of different RSA implementations
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Since the first announcement of a Side Channel Analysis (SCA) about ten years ago, considerable research has been devoted to studying these attacks on Application Specific Integrated Circuits (ASICs), such as smart cards or TPMs. In this article, we compare power-line attacks with ElectroMagnetic (EM) attacks, specifically targeting Field Programmable Gate Array devices (FPGAs), as they are becoming widely used for sensitive applications involving cryptography. We show experimentally that ElectroMagnetic Analysis (EMA) is always faster than the historical Differential Power Analysis (DPA) in retrieving keys of symmetric ciphers. In addition, these analyses prove to be very convenient to conduct, as they are totally non-invasive. Research reports indicate that EMA can be conducted globally, typically with macroscopic home-made coils circling the device under attack, with fair results. However, as accurate professional EM antennas are now becoming more accessible, it has become commonplace to carry out EM analyses locally. Cartography has been carried out by optical means on circuits realized with technology greater than 250 nanometers. Nonetheless, for deep submicron technologies, the feature size of devices that are spied upon is too small to be visible with photographic techniques. In addition, the presence of the 6+ metallization layers obviously prevents a direct observation of the layout. Therefore, EM imaging is emerging as a relevant means to discover the underlying device structure. In this article, we present the first images of deep-submicron FPGAs. The resolution is not as accurate as photographic pictures: we notably compare the layout of toy design examples placed at the four corners of the FPGAs with the EM images we collected. We observe that EM imaging has the advantage of revealing active regions, which can be useful in locating a particular processor (visible while active---invisible when inactive). In the context of EM attacks, we stress that the exact localization of the cryptographic target is not necessary: the coarse resolution we obtain is sufficient. We note that the EM imaging does not reveal the exact layout of the FPGA, but instead directly guides the attacker towards the areas which are leaking the most. We achieve attacks with an accurate sensor, both far from (namely on a SMC capacitor on the board) and close to (namely directly over the FPGA) the encryption co-processor. As compared to the previously published attacks, we report a successful attack on a DES module in fewer than 6,300 measurements, which is currently the best cracking performance against this encryption algorithm implemented in FPGAs.