Principles of interactive computer graphics (2nd ed.)
Principles of interactive computer graphics (2nd ed.)
Fundamentals of interactive computer graphics
Fundamentals of interactive computer graphics
Fast image generation of construcitve solid geometry using a cellular array processor
SIGGRAPH '85 Proceedings of the 12th annual conference on Computer graphics and interactive techniques
Fast spheres, shadows, textures, transparencies, and imgage enhancements in pixel-planes
SIGGRAPH '85 Proceedings of the 12th annual conference on Computer graphics and interactive techniques
A two-pass solution to the rendering equation: A synthesis of ray tracing and radiosity methods
SIGGRAPH '87 Proceedings of the 14th annual conference on Computer graphics and interactive techniques
Hardware acceleration for Window systems
SIGGRAPH '89 Proceedings of the 16th annual conference on Computer graphics and interactive techniques
Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories
SIGGRAPH '89 Proceedings of the 16th annual conference on Computer graphics and interactive techniques
A characterization of ten rasterization techniques
SIGGRAPH '89 Proceedings of the 16th annual conference on Computer graphics and interactive techniques
The rendering architecture of the DN10000VS
SIGGRAPH '90 Proceedings of the 17th annual conference on Computer graphics and interactive techniques
The accumulation buffer: hardware support for high-quality rendering
SIGGRAPH '90 Proceedings of the 17th annual conference on Computer graphics and interactive techniques
High speed high quality antialiased vector generation
SIGGRAPH '90 Proceedings of the 17th annual conference on Computer graphics and interactive techniques
Real-time display of quadric on the I.M.O.G.E.N.E. machine
SMA '91 Proceedings of the first ACM symposium on Solid modeling foundations and CAD/CAM applications
Texture mapping 3D models of real-world scenes
ACM Computing Surveys (CSUR)
The triangle processor and normal vector shader: a VLSI system for high performance graphics
SIGGRAPH '88 Proceedings of the 15th annual conference on Computer graphics and interactive techniques
Subanosecond pixel rendering with million transistor chips
SIGGRAPH '88 Proceedings of the 15th annual conference on Computer graphics and interactive techniques
A progressive refinement approach to fast radiosity image generation
SIGGRAPH '88 Proceedings of the 15th annual conference on Computer graphics and interactive techniques
High-performance polygon rendering
SIGGRAPH '88 Proceedings of the 15th annual conference on Computer graphics and interactive techniques
A display system for the Stellar graphics supercomputer model GS1000
SIGGRAPH '88 Proceedings of the 15th annual conference on Computer graphics and interactive techniques
Journal of Graphics Tools
The Silicon Graphics 4D/240GTX Superworkstation
IEEE Computer Graphics and Applications
Hardware-Assisted Polygon Antialiasing
IEEE Computer Graphics and Applications
IEEE Computer Graphics and Applications
3D graphics LSI core for mobile phone "Z3D"
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware
VLSI drawing processor utilizing multiple parallel scan-line processors
EGGH'87 Proceedings of the Second Eurographics conference on Advances in Computer Graphics Hardware
A VLSI architecture for image composition
EGGH'88 Proceedings of the Third Eurographics conference on Advances in Computer Graphics Hardware
A virtual memory system organization for bit-mapped graphics displays
EGGH'89 Proceedings of the Fourth Eurographics conference on Advances in Computer Graphics Hardware
Distributed frame buffer for rapid dynamic changes to 3D scenes
EGGH'92 Proceedings of the Seventh Eurographics conference on Graphics Hardware
An efficient massively parallel rasterization scheme for a high performance graphics system
EGGH'92 Proceedings of the Seventh Eurographics conference on Graphics Hardware
| Hi-index | 0.00 |
Image rendering is the performance bottleneck in many computer-graphics systems today because of its computation-intensive nature. Described here is a one-chip VLSI implementation of a shaded-polygon renderer which provides an affordable solution to the bottleneck. The chip takes advantage of a unique extension to Bresenham's vector drawing algorithm [1] to interpolate four axes (for Red, Green, Blue and Z) across a polygon, in addition to the X and Y values. Its inherent accuracy and ease of high-speed hardware implementation distinguish this new algorithm from interpolation with incrementing fractions (DDA).This chip was designed as part of a workstation primarily for mechanical engineering CAD applications. The pipelining and internal bandwidth possible on the chip allows rendering speeds of over twelve-thousand, 1000-pixel, shaded polygons per second, suitable for interactive manipulation of solids. Described in this paper is the derivation of the new algorithm and its implementation in a pipelined, polygon-rendering chip.