A scalable micro wireless interconnect structure for CMPs

  • Authors:

  • Suk-Bok Lee;Sai-Wang Tam;Ioannis Pefkianakis;Songwu Lu;M. Frank Chang;Chuanxiong Guo;Glenn Reinman;Chunyi Peng;Mishali Naik;Lixia Zhang;Jason Cong

  • Affiliations:

  • UCLA, Los Angeles, CA, USA;UCLA, Los Angeles, CA, USA;UCLA, Los Angeles, CA, USA;UCLA, Los Angeles, CA, USA;UCLA, Los Angeles, CA, USA;Microsoft Research Asia, Beijing, China;UCLA, Los Angeles, CA, USA;Microsoft Research Asia, Beijing, China;UCLA, Los Angeles, CA, USA;UCLA, Los Angeles, CA, USA;UCLA, Los Angeles, CA, USA

  • Venue:
  • Proceedings of the 15th annual international conference on Mobile computing and networking
  • Year:
  • 2009

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Abstract

This paper describes an unconventional way to apply wireless networking in emerging technologies. It makes the case for using a two-tier hybrid wireless/wired architecture to interconnect hundreds to thousands of cores in chip multiprocessors (CMPs), where current interconnect technologies face severe scaling limitations in excessive latency, long wiring, and complex layout. We propose a recursive wireless interconnect structure called the WCube that features a single transmit antenna and multiple receive antennas at each micro wireless router and offers scalable performance in terms of latency and connectivity. We show the feasibility to build miniature on-chip antennas, and simple transmitters and receivers that operate at 100-500 GHz sub-terahertz frequency bands. We also devise new two-tier wormhole based routing algorithms that are deadlock free and ensure a minimum-latency route on a 1000-core on-chip interconnect network. Our simulations show that our protocol suite can reduce the observed latency by 20% to 45%, and consumes power that is comparable to or less than current 2-D wired mesh designs.