B*-Trees: a new representation for non-slicing floorplans
Proceedings of the 37th Annual Design Automation Conference
Analog Device-Level Layout Automation
Analog Device-Level Layout Automation
3D thermal-ADI: an efficient chip-level transient thermal simulator
Proceedings of the 2003 international symposium on Physical design
Placement with symmetry constraints for analog layout design using TCG-S
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
RF Circuit Design: Theory & Applications (2nd Edition)
RF Circuit Design: Theory & Applications (2nd Edition)
Analog placement with symmetry and other placement constraints
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Analog placement based on novel symmetry-island formulation
Proceedings of the 44th annual Design Automation Conference
Thermal-driven Symmetry Constraint for Analog Layout with CBL Representation
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Analog placement with common centroid constraints
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Symmetry-aware placement with transitive closure graphs for analog layout design
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Symmetry constraint based on mismatch analysis for analog layout in SOI technology
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Analog placement based on hierarchical module clustering
Proceedings of the 45th annual Design Automation Conference
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Symmetry within the sequence-pair representation in the context of placement for analog design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On the exploration of the solution space in analog placement with symmetry constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Performance-driven analog placement considering boundary constraint
Proceedings of the 47th Design Automation Conference
Thermal-aware bus-driven floorplanning
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Proceedings of the 48th Design Automation Conference
A corner stitching compliant B*-tree representation and its applications to analog placement
Proceedings of the International Conference on Computer-Aided Design
Routability-driven placement algorithm for analog integrated circuits
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
LAYGEN II: automatic analog ICs layout generator based on a template approach
Proceedings of the 14th annual conference on Genetic and evolutionary computation
Proceedings of the International Conference on Computer-Aided Design
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With the thermal effect, improper analog placements may degrade circuit performance because the thermal impact from power devices can affect electrical characteristics of the thermally-sensitive devices. There is not much previous work that considers the desired placement configuration between power and thermally-sensitive devices for a better thermal profile to reduce the thermally-induced mismatches. In this paper, we first introduce the properties of a desired thermal profile for better thermal matching of the matched devices. We then propose a thermal-driven analog placement methodology to achieve the desired thermal profile and to consider the best device matching under the thermal profile while satisfying the symmetry and the common-centroid constraints. Experimental results based on real analog circuits show that our approach can achieve the best analog circuit performance/accuracy with the least impact due to the thermal gradient, among existing works.