Toward formalizing a validation methodology using simulation coverage
DAC '97 Proceedings of the 34th annual Design Automation Conference
A deductive technique for diagnosis of bridging faults
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Modeling the unknown! Towards model-independent fault and error diagnosis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Core-Based Scan Architecture for Silicon Debug
ITC '02 Proceedings of the 2002 IEEE International Test Conference
A Survey of Techniques for Formal Verification of Combinational Circuits
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
Safety Property Verification Using Sequential SAT and Bounded Model Checking
IEEE Design & Test
Post-verification debugging of hierarchical designs
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
CADRE: Cycle-Accurate Deterministic Replay for Hardware Debugging
DSN '06 Proceedings of the International Conference on Dependable Systems and Networks
Diagnosing Silicon Failures Based on Functional Test Patterns
MTV '06 Proceedings of the Seventh International Workshop on Microprocessor Test and Verification
Interactive presentation: Low cost debug architecture using lossy compression for silicon debug
Proceedings of the conference on Design, automation and test in Europe
Extraction error modeling and automated model debugging in high-performance custom designs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Diagnosing arbitrary defects in logic designs using single location at a time (SLAT)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Post-silicon debugging for multi-core designs
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
From RTL to silicon: the case for automated debug
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Post-silicon bug diagnosis with inconsistent executions
Proceedings of the International Conference on Computer-Aided Design
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Since pre-silicon functional verification is insufficient to detect all design errors, re-spins are often needed due to malfunctions that escape into the silicon. This paper presents an automated software solution to analyze the data collected during silicon debug. The proposed methodology analyzes the test sequences to detect suspects in both the spatial and the temporal domain. A set of software debug techniques are proposed to analyze the acquired data from the hardware testing and provide suggestions for the setup of the test environment in the next debug session. A comprehensive set of experiments demonstrate its effectiveness in terms of run-time and resolution.