G-vector: A New Model for Glitch Analysis in Logic Circuits
Journal of VLSI Signal Processing Systems
Practical Design of Globally-Asynchronous Locally-Synchronous Systems
ASYNC '00 Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems
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Proceedings of the conference on Design, automation and test in Europe
Globally-asynchronous locally-synchronous systems (performance, reliability, digital)
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Fault Detection and Isolation Techniques for Quasi Delay-Insensitive Circuits
DSN '04 Proceedings of the 2004 International Conference on Dependable Systems and Networks
ASYNC '05 Proceedings of the 11th IEEE International Symposium on Asynchronous Circuits and Systems
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IEICE - Transactions on Information and Systems
Physical Design Essentials: An ASIC Design Implementation Perspective
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VLSID '08 Proceedings of the 21st International Conference on VLSI Design
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IEEE Transactions on Circuits and Systems Part I: Regular Papers
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IBM Journal of Research and Development
IEEE Transactions on Circuits and Systems Part I: Regular Papers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Automatic synthesis of extended burst-mode circuits. II. (Automatic synthesis)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper proposes a novel solution to make asynchronous handshake interfaces tolerant to crosstalk-glitch propagation (GP). This study leverages our recently proposed crosstalk-glitch modeling technique for asynchronous systems, which models the crosstalk GP in asynchronous interfaces. In this paper, a novel set of solutions to quench the GP is proposed. This set of solutions is called crosstalk-glitch gating, as the quenching is obtained by using carefully generated control signals. A step-by-step method is recommended to apply crosstalk-glitch gating to conventional asynchronous handshake interfaces. Transistor-level electrical simulations demonstrate that our method effectively generates crosstalk-glitch gate-controlling signals. In comparison with contemporary signal-integrity management techniques, our gating methodology can be applied to fewer nodes and earlier in the design cycle.