Delay-Insensitive, Point-to-Point Interconnect Using M-of-N Codes

Authors:
W. J. Bainbridge;W. B. Toms;D. A. Edwards;S. B. Furber
Affiliations:
-;-;-;-
Venue:
ASYNC '03 Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems
Year:
2003

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Abstract

m-of-n codes can be used for carrying data over self-timed on-chip interconnect links. Such codes can be chosen to have low redundancy, but the costs of encoding/decodingdata is high. The key to enabling the cost-effective use of m-of-n codes is to find a suitable mapping of the binary data to the code.This paper presents a new method for selecting suitable mappings through the decomposition of the complex m-of-n code into an incomplete m-of-n code constructed from groups of smaller, simpler m-of-n and 1-of-n codes.The circuits used both for completion detection and for encoding/decoding such incomplete codes show reduced logic size and delay compared to their full m-of-n counter-parts. The improvements mean that the incomplete m-of-n codes become attractive for use in on-chip interconnects and network-on-chip designs.