Towards Sound Approaches to Counteract Power-Analysis Attacks
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
Using Second-Order Power Analysis to Attack DPA Resistant Software
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
Differential Power Analysis in the Presence of Hardware Countermeasures
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
On the Masking Countermeasure and Higher-Order Power Analysis Attacks
ITCC '05 Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC'05) - Volume I - Volume 01
On second-order differential power analysis
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Improved higher-order side-channel attacks with FPGA experiments
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Proceedings of the 44th annual Design Automation Conference
RIJID: random code injection to mask power analysis based side channel attacks
Proceedings of the 44th annual Design Automation Conference
A smart random code injection to mask power analysis based side channel attacks
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Protecting AES Software Implementations on 32-Bit Processors Against Power Analysis
ACNS '07 Proceedings of the 5th international conference on Applied Cryptography and Network Security
Gaussian Mixture Models for Higher-Order Side Channel Analysis
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Side Channel Cryptanalysis of a Higher Order Masking Scheme
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Block Ciphers Implementations Provably Secure Against Second Order Side Channel Analysis
Fast Software Encryption
Attacking State-of-the-Art Software Countermeasures--A Case Study for AES
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Higher-Order Masking and Shuffling for Software Implementations of Block Ciphers
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
You Cannot Hide behind the Mask: Power Analysis on a Provably Secure S-Box Implementation
Information Security Applications
Investigations of power analysis attacks and countermeasures for ARIA
WISA'06 Proceedings of the 7th international conference on Information security applications: PartI
A generic method for secure Sbox implementation
WISA'07 Proceedings of the 8th international conference on Information security applications
Provably secure higher-order masking of AES
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
Principles on the security of AES against first and second-order differential power analysis
ACNS'10 Proceedings of the 8th international conference on Applied cryptography and network security
On practical second-order power analysis attacks for block ciphers
ICICS'10 Proceedings of the 12th international conference on Information and communications security
Affine masking against higher-order side channel analysis
SAC'10 Proceedings of the 17th international conference on Selected areas in cryptography
Extended cubes: enhancing the cube attack by extracting low-degree non-linear equations
Proceedings of the 6th ACM Symposium on Information, Computer and Communications Security
Montgomery's trick and fast implementation of masked AES
AFRICACRYPT'11 Proceedings of the 4th international conference on Progress in cryptology in Africa
Thwarting higher-order side channel analysis with additive and multiplicative maskings
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
Design of an ultra high speed AES processor for next generation IT security
Computers and Electrical Engineering
Threshold implementations against side-channel attacks and glitches
ICICS'06 Proceedings of the 8th international conference on Information and Communications Security
Towards security limits in side-channel attacks
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Pinpointing the side-channel leakage of masked AES hardware implementations
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Practical power analysis attacks on software implementations of mceliece
PQCrypto'10 Proceedings of the Third international conference on Post-Quantum Cryptography
An AES smart card implementation resistant to power analysis attacks
ACNS'06 Proceedings of the 4th international conference on Applied Cryptography and Network Security
Template attacks on masking—resistance is futile
CT-RSA'07 Proceedings of the 7th Cryptographers' track at the RSA conference on Topics in Cryptology
Revisiting higher-order DPA attacks: multivariate mutual information analysis
CT-RSA'10 Proceedings of the 2010 international conference on Topics in Cryptology
Overcoming significant noise: correlation-template-induction attack
ISPEC'12 Proceedings of the 8th international conference on Information Security Practice and Experience
Randomized Instruction Injection to Counter Power Analysis Attacks
ACM Transactions on Embedded Computing Systems (TECS)
Analyzing side channel leakage of masked implementations with stochastic methods
ESORICS'07 Proceedings of the 12th European conference on Research in Computer Security
Selecting time samples for multivariate DPA attacks
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
On the use of shamir's secret sharing against side-channel analysis
CARDIS'12 Proceedings of the 11th international conference on Smart Card Research and Advanced Applications
Secure multiple SBoxes implementation with arithmetically masked input
CARDIS'12 Proceedings of the 11th international conference on Smart Card Research and Advanced Applications
A power side-channel-based digital to analog converterfor Xilinx FPGAs
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
| Hi-index | 0.00 |
In this article we describe an improved concept for second-order differential-power analysis (DPA) attacks on masked smart card implementations of block ciphers. Our concept allows to mount second-order DPA attacks in a rather simple way: a second-order DPA attack consists of a pre-processing step and a DPA step. Therefore, our way of performing second-order DPA attacks allows to easily assess the number of traces that are needed for a successful attack. We give evidence on the effectiveness of our methodology by showing practical attacks on a masked AES smart card implementation. In these attacks we target inputs and outputs of the SubBytes operation in the first encryption round.