Discrete sizing for leakage power optimization in physical design: A comparative study

Authors:
Santiago Mok;John Lee;Puneet Gupta
Affiliations:
University of California at Los Angeles;University of California at Los Angeles;University of California at Los Angeles
Venue:
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
Year:
2013

Citing 16
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Abstract

While sizing has been studied for over three decades, the absence of a common framework with which to compare methods has made progress difficult to measure. In this article, we compare popular sizing techniques in which gates are chosen from a discrete standard cell library and slew and interconnect effects are accounted for. The difference between sizing methods reduces from roughly 53% to 8% between best and worst case after slew propagation is taken into account. In our benchmarks, no one sizing technique consistently outperforms the others.