Minimizing interconnect energy through integrated low-power placement and combinational logic synthesis

  • Authors:
  • Glenn Holt;Akhilesh Tyagi

  • Affiliations:
  • Department of Computer Science, Iowa State University;Department of Computer Science, Iowa State University

  • Venue:
  • Proceedings of the 1997 international symposium on Physical design
  • Year:
  • 1997

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Abstract