ACTAS: an accurate timing analysis system for VLSI
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Principles of design automatioon system for very large scale computer design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Path delay analysis for hierarchical building block layout system
DAC '83 Proceedings of the 20th Design Automation Conference
DAC '83 Proceedings of the 20th Design Automation Conference
Switch-level delay models for digital MOS VLSI
DAC '84 Proceedings of the 21st Design Automation Conference
Hierarchical design verification for large digital systems
DAC '81 Proceedings of the 18th Design Automation Conference
A critical path delay check system
DAC '81 Proceedings of the 18th Design Automation Conference
Timing Verification and the Timing Analysis program
DAC '82 Proceedings of the 19th Design Automation Conference
Developments in logic network path delay analysis
DAC '82 Proceedings of the 19th Design Automation Conference
Timing verification system based on delay time hierarchical nature
DAC '82 Proceedings of the 19th Design Automation Conference
Efficient algorithms for extracting the K most critical paths in timing analysis
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Basic concepts of timing-oriented design automation for high-performance mainframe computers
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Timing- and constraint-oriented placement for interconnected LSIs in mainframe design
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Principles of design automatioon system for very large scale computer design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
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A delay analysis system called DASP was developed. DASP was proved to be very effective to reveal delay errors in a large scale computer design with the following features. (1) It analyzes automatically the delay time of paths between all flip-flops including paths that pass through different hierarchical levels. (2) It traces paths with high speed by a modified depth first search method that was newly developed. (3) It recognizes clock signals providing useful delay analysis information for multiple clocked synchronous logic circuits. DASP was applied to develop Hitachi's high performance computer M-68X and contributed much to save its development time.