High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies

Authors:
Mohamed W. Allam;Mohab H. Anis;Mohamed I. Elmasry
Affiliations:
VLSI Research Group, University of Waterloo, Waterloo, ON, Canada N2L 3G1;VLSI Research Group, University of Waterloo, Waterloo, ON, Canada N2L 3G1;VLSI Research Group, University of Waterloo, Waterloo, ON, Canada N2L 3G1
Venue:
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Year:
2000

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Abstract

A new high-speed Domino circuit, called HS-Domino is developed. HS-Domino resolves the trade-off between performance and noise margins in conventional CD-Domino logic while dissipating low dynamic power with minimal area overhead. A dual-threshold (MTCMOS) implementation of HS-Domino and DDCVS logic is also devised. This implementation achieves low leakage values during standby, while maintaining high performance and lowdynamic power during the active mode.