Efficient test data compression and decompression for system-on-a-chip using internal scan chains and Golomb coding

Test set compaction algorithms for combinational circuits

Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design

Deterministic Built-in Pattern Generation for Sequential Circuits

Journal of Electronic Testing: Theory and Applications

An Efficient, Forward Fault Simulation Algorithm Based on the Parallel Pattern Single Fault Propagation

Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner

Testing embedded-core based system chips

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Test vector decompression via cyclical scan chains and its application to testing core-based designs

ITC '98 Proceedings of the 1998 IEEE International Test Conference

11.1 High-Speed Serializing/De-Serializing Design-For-Test Method for Evaluating a 1 GHz Microprocessor

VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium

Test Data Compression for System-on-a-Chip Using Golomb Codes

VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium

System-on-a-chip test-data compression and decompression architectures based on Golomb codes

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems