Behavior Analysis of Internal Feedback Bridging Faults in CMOS Circuits

  • Authors:
  • Yukiya Miura;Shuichi Seno

  • Affiliations:
  • Graduate School of Engineering, Tokyo Metropolitan University, Tokyo 192-0397, Japan. miura@eei.metro-u.ac.jp;Graduate School of Engineering, Tokyo Metropolitan University, Tokyo 192-0397, Japan

  • Venue:
  • Journal of Electronic Testing: Theory and Applications
  • Year:
  • 2002

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Abstract

In this paper we analyze fault behaviors of internal feedback bridging faults. To investigate their behaviors, we use a simple circuit model consisting of 2-input NAND gate and NOT gate. From analysis results, we find that behaviors of internal feedback bridging faults are more complex than those of external feedback bridging faults. We expose that they cause IDDQ-only failure, internal latch and internal oscillation as well as latch and oscillation behavior. These phenomena are caused by the following facts: formation of an electrically conducting feedback loop and connection of the feedback loop with the circuit output depend on input values of the circuit, and the feedback loop is often alive only within the circuit. We also discuss methods for detecting this kind of fault.