Minimal Test Sets for Combinatorial Circuits

Generation of deterministic test patterns by minimal basic test sets

EURO-DAC '92 Proceedings of the conference on European design automation

Cost-effective generation of minimal test sets for stuck-at faults in combinational logic circuits

DAC '93 Proceedings of the 30th international Design Automation Conference

On generating compact test sequences for synchronous sequential circuits

EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation

Pattern generation for a deterministic BIST scheme

ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

Test set compaction algorithms for combinational circuits

Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design

Mixed-Mode BIST Using Embedded Processors

Journal of Electronic Testing: Theory and Applications - Special issue on On-line testing

COMPACTEST-II: a method to generate compact two-pattern test sets for combinational logic circuits

ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

Test vector decompression via cyclical scan chains and its application to testing core-based designs

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Accumulator based deterministic BIST

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Tailoring ATPG for Embedded Testing

ITC '01 Proceedings of the 2001 IEEE International Test Conference

On Static Test Compaction and Test Pattern Ordering for Scan Designs

ITC '01 Proceedings of the 2001 IEEE International Test Conference

Test vector decomposition-based static compaction algorithms for combinational circuits

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Dynamic Test Compaction for Bridging Faults

ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design

A test clock reduction method for scan-designed circuits

ITC'94 Proceedings of the 1994 international conference on Test

Improved SAT-based ATPG: more constraints, better compaction

Proceedings of the International Conference on Computer-Aided Design