Boundary-scan design principles for efficient LSSD ASIC testing
IBM Journal of Research and Development
Test methodologies and design automation for IBM ASICs
IBM Journal of Research and Development
Advanced microprocessor test strategy and methodology
IBM Journal of Research and Development - Special issue: IBM S/390 G3 and G4
IEEE Spectrum
The Test Access Port and Boundary-Scan Architecture
The Test Access Port and Boundary-Scan Architecture
Testing the 500-MHz IBM S/390 Microprocessor
IEEE Design & Test
Delay test of chip I/Os using LSSD boundary scan
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Testing embedded-core based system chips
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Test vector decompression via cyclical scan chains and its application to testing core-based designs
ITC '98 Proceedings of the 1998 IEEE International Test Conference
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Scan Vector Compression/Decompression Using Statistical Coding
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Test Data Compression for System-on-a-Chip Using Golomb Codes
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
At-Speed Testing of Delay Faults for Motorola's MPC7400, a PowerPC(tm) Microprocessor
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
DFT-Focused Chip Testers: What Can They Really Do?
ITC '00 Proceedings of the 2000 IEEE International Test Conference
On Using IEEE P1500 SECT for Test Plug-n-Play
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Decompression of test data using variable-length seed LFSRs
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
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This paper presents enhanced reduced pin-count test(E-RPCT) for low-cost test.E-RPCT is an extension oftraditional RPCT for circuits in which a large number ofdigital IC pins is multiplexed for scan.The basic conceptof E-RPCT is to provide access to the internal scan chainsvia an IEEE 1149.1 compatible boundary-scan architecture,instead of direct access via the IC pins.The boundary-scanchain performs serial/parallel conversion of testdata.E-RPCT also provides I/O wrap to test non-contactedpins.The paper presents E-RPCT for full-scandesign, as well as for full-scan core-based design.