Rectangle-packing-based module placement
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
How good are slicing floorplans?
Proceedings of the 1997 international symposium on Physical design
An O-tree representation of non-slicing floorplan and its applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A new algorithm for floorplan design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
B*-Trees: a new representation for non-slicing floorplans
Proceedings of the 37th Annual Design Automation Conference
TCG: a transitive closure graph-based representation for non-slicing floorplans
Proceedings of the 38th annual Design Automation Conference
TCG-S: orthogonal coupling of P*-admissible representations for general floorplans
Proceedings of the 39th annual Design Automation Conference
Optimality, scalability and stability study of partitioning and placement algorithms
Proceedings of the 2003 international symposium on Physical design
DAC '82 Proceedings of the 19th Design Automation Conference
A Tight Area Upper Bound for Slicing Floorplans
VLSID '00 Proceedings of the 13th International Conference on VLSI Design
Fixed-Outline Floorplanning through Better Local Search
ICCD '01 Proceedings of the International Conference on Computer Design: VLSI in Computers & Processors
Module packing based on the BSG-structure and IC layout applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Practical slicing and non-slicing block-packing without simulated annealing
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Optimality study of logic synthesis for LUT-based FPGAs
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Simultaneous block and I/O buffer floorplanning for flip-chip design
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Fast floorplanning by look-ahead enabled recursive bipartitioning
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Solving hard instances of floorplacement
Proceedings of the 2006 international symposium on Physical design
Solving modern mixed-size placement instances
Integration, the VLSI Journal
A novel fixed-outline floorplanner with zero deadspace for hierarchical design
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
UFO: unified convex optimization algorithms for fixed-outline floorplanning
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
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A novel algorithm for rectangular floorplanning with guaranteed 100% area utilization is used to construct new sets of floorplanning benchmarks. By minimizing the maximum block aspect ratio subject to a zero-dead-space constraint, example zero-dead-space (ZDS) floorplans matching the area profiles of any existing floorplanning benchmark circuits can be constructed. A mathematical analysis shows that the aspect ratios of the ZDS benchmarks' blocks are uniformly bounded within [1, 3] in most cases. Block packings produced by the Parquet, B*-tree, TCG-S, and BloBB packages on these new benchmarks are compared to the optimal-area floorplans produced by the ZDS algorithm.