Teaching a course in parallel processing with limited resources
SIGCSE '91 Proceedings of the twenty-second SIGCSE technical symposium on Computer science education
A model for estimating trace-sample miss ratios
SIGMETRICS '91 Proceedings of the 1991 ACM SIGMETRICS conference on Measurement and modeling of computer systems
A novel cache design for vector processing
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
A neural network based algorithm for the scheduling problem in high-level synthesis
EURO-DAC '92 Proceedings of the conference on European design automation
Cache inclusion and processor sampling in multiprocessor simulations
SIGMETRICS '93 Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Effectiveness of trace sampling for performance debugging tools
SIGMETRICS '93 Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Making parallel simulations go fast
WSC '92 Proceedings of the 24th conference on Winter simulation
Introducing a New Cache Design into Vector Computers
IEEE Transactions on Computers
Reducing PE/Memory Traffic in Multiprocessors by the Difference Coding of Memory Addresses
IEEE Transactions on Parallel and Distributed Systems
Integrating parallel algorithm design with parallel machine models
SIGCSE '95 Proceedings of the twenty-sixth SIGCSE technical symposium on Computer science education
Buffer management in shared-memory Time Warp systems
PADS '95 Proceedings of the ninth workshop on Parallel and distributed simulation
A cache approach for supporting life-time UPT number
Wireless Networks
Simple, fast, and practical non-blocking and blocking concurrent queue algorithms
PODC '96 Proceedings of the fifteenth annual ACM symposium on Principles of distributed computing
Parallel Computer Vision on a Reconfigurable Multiprocessor Network
IEEE Transactions on Parallel and Distributed Systems
Trace-driven memory simulation: a survey
ACM Computing Surveys (CSUR)
Fault-Tolerant Interleaved Memory Systems with Two-Level Redundancy
IEEE Transactions on Computers
A top-down design environment for developing pipelined datapaths
DAC '98 Proceedings of the 35th annual Design Automation Conference
Implementation of reductions in support of PDES on a network of workstations
PADS '98 Proceedings of the twelfth workshop on Parallel and distributed simulation
Combining Trace Sampling with Single Pass Methods for Efficient Cache Simulation
IEEE Transactions on Computers
Designing Tree-Based Barrier Synchronization on 2D Mesh Networks
IEEE Transactions on Parallel and Distributed Systems
A Software Approach to Avoiding Spatial Cache Collisions in Parallel Processor Systems
IEEE Transactions on Parallel and Distributed Systems
Time- and VLSI-Optimal Sorting on Enhanced Meshes
IEEE Transactions on Parallel and Distributed Systems
A Practical Methodology for the Formal Verification of RISC Processors
Formal Methods in System Design
Optimal replacements in caches with two miss costs
Proceedings of the eleventh annual ACM symposium on Parallel algorithms and architectures
Supporting Timing Analysis by Automatic Bounding of LoopIterations
Real-Time Systems - Special issue on worst-case execution-time analysis
A greedy hypercube-labeling algorithm
ACM-SE 30 Proceedings of the 30th annual Southeast regional conference
Structural Fault Testing of Embedded Cores Using Pipelining
Journal of Electronic Testing: Theory and Applications
IEEE Micro
Interrupt Handling for Out-of-Order Execution Processors
IEEE Transactions on Computers
A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches
IEEE Transactions on Computers
Maximum Performance Pipelines With Switchable Reservation Tables
IEEE Transactions on Computers
Massively Parallel Algorithms for Trace-Driven Cache Simulations
IEEE Transactions on Parallel and Distributed Systems
Time-Optimal Visibility-Related Algorithms on Meshes with Multiple Broadcasting
IEEE Transactions on Parallel and Distributed Systems
Parallel Dimension Permutations on Star-Graph
PACT '93 Proceedings of the IFIP WG10.3. Working Conference on Architectures and Compilation Techniques for Fine and Medium Grain Parallelism
1.3 Parallelism in Structural Fault Testing of Embedded Cores
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Parallel simulation of orography influence on large-scale atmosphere motion on APEmille
Proceedings of the 1st conference on Computing frontiers
Synchronization and cache coherence in computer design
Journal of Computing Sciences in Colleges
Simple penalty-sensitive replacement policies for caches
Proceedings of the 3rd conference on Computing frontiers
On the implementation of parallel shortest path algorithms on a supercomputer
ISPA'06 Proceedings of the 4th international conference on Parallel and Distributed Processing and Applications
MARTI: a multiprocessor architecture for ray tracing images
EGGH'90 Proceedings of the Fifth Eurographics conference on Advances in Computer Graphics Hardware: rendering, ray tracing and visualization systems
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