Optimal VLSI architectural synthesis: area, performance and testability

Optimal scheduling and allocation of embedded VLSI chips

DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference

MIST—a design aid for programmable pipelined processors

DAC '94 Proceedings of the 31st annual Design Automation Conference

Module assignment for low power

EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation

Energy minimization using multiple supply voltages

ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design

Computing lower bounds on functional units before scheduling

ISSS '94 Proceedings of the 7th international symposium on High-level synthesis

Execution interval analysis under resource constraints

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Datapath scheduling with multiple supply voltages and level converters

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Optimal synthesis of multichip architectures

ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

Temporal partitioning combined with design space exploration for latency minimization of run-time reconfigured designs

DATE '99 Proceedings of the conference on Design, automation and test in Europe

Buffer Assignment Algorithms on Data Driven ASICs

IEEE Transactions on Computers

Design-Space Exploration for Block-Processing Based TemporalPartitioning of Run-Time Reconfigurable Systems

Journal of VLSI Signal Processing Systems - Special issue on VLSI on custom computing technology

Optimal temporal partitioning and synthesis for reconfigurable architectures

Proceedings of the conference on Design, automation and test in Europe

ILP-based Instruction Scheduling for IA-64

OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems

Exact scheduling strategies based on bipartite graph matching

EDTC '95 Proceedings of the 1995 European conference on Design and Test

Datapath BIST Insertion Using Pre-Characterized Area and Testability Data

Journal of Electronic Testing: Theory and Applications

A look-ahead synthesis technique with backtracking for switching activity reduction in low power high-level synthesis

Microelectronics Journal

Computation of storage requirements for multi-dimensional signal processing applications

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

A hybrid Branch-and-Bound and evolutionary approach for allocating strings of applications to heterogeneous distributed computing systems

Journal of Parallel and Distributed Computing

Computation of the minimum data storage and applications in memory management for multimedia signal processing

Integrated Computer-Aided Engineering

Storage Estimation and Design Space Exploration Methodologies for the Memory Management of Signal Processing Applications

Journal of Signal Processing Systems

Coactive scheduling and checkpoint determination during high level synthesis of self-recovering microarchitectures

IEEE Transactions on Very Large Scale Integration (VLSI) Systems