Performance-oriented technology mapping
AUSCRYPT '90 Proceedings of the sixth MIT conference on Advanced research in VLSI
Optimal VLSI architectural synthesis: area, performance and testability
Optimal VLSI architectural synthesis: area, performance and testability
Adaptive filter theory (2nd ed.)
Adaptive filter theory (2nd ed.)
On the circuit implementation problem
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Clustered voltage scaling technique for low-power design
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
HYPER-LP: a system for power minimization using architectural transformations
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
High-Level VLSI Synthesis
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Algorithmic Graph Theory and Perfect Graphs (Annals of Discrete Mathematics, Vol 57)
Algorithmic Graph Theory and Perfect Graphs (Annals of Discrete Mathematics, Vol 57)
Computing the area versus delay trade-off curves in technology mapping
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Datapath scheduling with multiple supply voltages and level converters
ACM Transactions on Design Automation of Electronic Systems (TODAES)
High-level power modeling, estimation, and optimization
DAC '97 Proceedings of the 34th annual Design Automation Conference
Power optimization of variable voltage core-based systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
On-line scheduling of hard real-time tasks on variable voltage processor
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Codex-dp: co-design of communicating systems using dynamic programming
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Layout techniques supporting the use of dual supply voltages for cell-based designs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Low-power design methodology and applications utilizing dual supply voltages
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Compiler-directed dynamic voltage/frequency scheduling for energy reduction in microprocessors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Enhanced clustered voltage scaling for low power
Proceedings of the 12th ACM Great Lakes symposium on VLSI
Cell-based layout techniques supporting gate-level voltage scaling for low power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Compiler-Directed Dynamic Frequency and Voltage Scheduling
PACS '00 Proceedings of the First International Workshop on Power-Aware Computer Systems-Revised Papers
Algorithms Promoting the Use of Dual Supply Voltages for Power-Driven Designs
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
Minimizing Energy Consumption for High-Performance Processing
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
High level techniques for power-grid noise immunity
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Approaching the Maximum Energy Saving on Embedded Systems with Multiple Voltages
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Energy-efficient dual-voltage soft real-time system with (m,k)-firm deadline guarantee
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Power minimization in QoS sensitive systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An on-line approach for power minimization in QoS sensitive systems
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Voltage setup problem for embedded systems with multiple voltages
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Voltage island aware floorplanning for power and timing optimization
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Power deregulation: eliminating off-chip voltage regulation circuitry from embedded systems
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Voltage-Island partitioning and floorplanning under timing constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Clustering-based simultaneous task and voltage scheduling for NoC systems
Proceedings of the International Conference on Computer-Aided Design
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