Voltage-Island partitioning and floorplanning under timing constraints

Authors:
Wan-Ping Lee;Hung-Yi Liu;Yao-Wen Chang
Affiliations:
Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan and Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA;Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan and Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, Taiwan;Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan and Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan
Venue:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Year:
2009

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Abstract

Power consumption is a crucial concern in nanometer chip design. Researchers have shown that multiple supply voltage (MSV) is an effective method for power consumption reduction. The underlying idea behind MSV is the tradeoff between power saving and performance. In this paper, we present an effective voltage-assignment technique based on dynamic programming. For circuits without reconvergent fan-outs, an optimal solution for the voltage assignment is guaranteed; for circuits with reconvergent fan-outs, a near-optimal solution is obtained. We then generate a level shifter for each net that connects two blocks in different voltage domains and perform power-network-aware floorplanning for the MSV design. Experimental results show that our floorplanner is very effective in optimizing power consumption under timing constraints.