Technology and design challenges for low power and high performance
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Temperature-aware microarchitecture
Proceedings of the 30th annual international symposium on Computer architecture
Monitoring Temperature in FPGA based SoCs
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
A high efficiency full-chip thermal simulation algorithm
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Fast thermal simulation for architecture level dynamic thermal management
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
The M5 Simulator: Modeling Networked Systems
IEEE Micro
Thermal conduction in sub-100nm transistors
Microelectronics Journal
3-D Thermal-ADI: a linear-time chip level transient thermal simulator
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IC thermal simulation and modeling via efficient multigrid-based approaches
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ISAC: Integrated Space-and-Time-Adaptive Chip-Package Thermal Analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Design space exploration of FinFET cache
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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Thermal analysis has long been essential for designing reliable high-performance cost-effective integrated circuits (ICs). Increasing power densities are making this problem more important. Characterizing the thermal profile of an IC quickly enough to allow feedback on the thermal effects of tentative design changes is a daunting problem, and its complexity is increasing. The move to nanometer-scale fabrication processes is increasing the importance of thermal phenomena such as ballistic phonon transport. The accurate thermal analysis of nanometer-scale ICs containing hundreds of millions of devices requires characterization of heat transport across multiple length scales. These scales range from the nanometer scale (device-level impact) to the centimeter scale (cooling package impact). Existing chip-package thermal analysis methods based on classical Fourier heat transfer cannot capture nanometer-scale thermal effects. However, accurate device-level modeling techniques, such as molecular dynamics methods, are far too slow for use in full-chip IC thermal analysis. In this paper, we propose and develop ThermalScope, a multiscale thermal analysis method for nanometer-scale IC design. It unifies microscopic and macroscopic thermal modeling methods, i.e., the Boltzmann transport equation and Fourier modeling methods.Moreover, it supports adaptive multiresolution modeling. Together, these ideas enable the efficient and accurate characterization of nanometer-scale heat transport as well as the chip-package-level heat flow. ThermalScope is designed for full-chip thermal analysis of billion-transistor nanometerscale IC designs, with accuracy at the scale of individual devices. ThermalScope enables the accurate characterization of various temperature-related effects, such as temperature-dependent leakage power and temperature-timing dependences. ThermalScope has been implemented in software and used for the full-chip thermal analysis and temperature-dependent leakage analysis of an IC design with more than 150 million transistors. ThermalScope will be publicly released for free academic and personal use.