Low power realization of finite state machines—a decomposition approach
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Finite state machine decomposition for low power
DAC '98 Proceedings of the 35th annual Design Automation Conference
Spanning tree based state encoding for low power dissipation
DATE '99 Proceedings of the conference on Design, automation and test in Europe
FSM Decomposition for Low Power in FPGA
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Low power FSM design using Huffman-style encoding
EDTC '97 Proceedings of the 1997 European conference on Design and Test
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Low power synthesis of finite state machines with mixed D and T flip-flops
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Power Gating with Multiple Sleep Modes
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Physical design methodology of power gating circuits for standard-cell-based design
Proceedings of the 43rd annual Design Automation Conference
Energy Efficiency of Power-Gating in Low-Power Clocked Storage Elements
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Genetic algorithm-based FSM synthesis with area-power trade-offs
Integration, the VLSI Journal
Design and application of multimodal power gating structures
ISQED '09 Proceedings of the 2009 10th International Symposium on Quality of Electronic Design
Power Management of Datacenter Workloads Using Per-Core Power Gating
IEEE Computer Architecture Letters
Power gating design for standard-cell-like structured ASICs
Proceedings of the Conference on Design, Automation and Test in Europe
Control for power gating of wires
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
NOVA: state assignment of finite state machines for optimal two-level logic implementation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
MUSTANG: state assignment of finite state machines targeting multilevel logic implementations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
VDAT'12 Proceedings of the 16th international conference on Progress in VLSI Design and Test
Energy efficient computation: A silicon perspective
Integration, the VLSI Journal
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Power-gating turns off the power supply of a portion of the circuit completely, resulting in total elimination of power consumption for that part. However, it also necessitates that the sub-circuit to be activated should be charged for some time before its activation. This critical issue can influence the decomposition of a finite state machine (FSM) for its power gated implementation. In this paper we have presented a power-gating method that integrates FSM partitioning with state encoding, thus providing a total solution to the problem of power-aware FSM synthesis. It shows better results, in terms of dynamic and leakage power consumption, compared to the existing techniques reported in the literature.