Combinatorial optimization: algorithms and complexity
Combinatorial optimization: algorithms and complexity
REAL: a program for REgister ALlocation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Design representation and behavioral transformation for algorithmic level integrated circuit design
Design representation and behavioral transformation for algorithmic level integrated circuit design
Experience with ADAM synthesis system
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Global scheduling independent of control dependencies based on condition vectors
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Representing conditional branches for high-level synthesis applications
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Linear network optimization: algorithms and codes
Linear network optimization: algorithms and codes
Optimum and heuristic data path scheduling under resource constraints
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
The combination of scheduling, allocation, and mapping in a single algorithm
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A generalized interconnect model for data path synthesis
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A global, dynamic register allocation and binding for a data path synthesis system
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Data path tradeoffs using MABAL
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Constraint improvements for MILP-based hardware synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Relevant issues in high-level connectivity synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
3D scheduling: high-level synthesis with floorplanning
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Empirical evaluation of some high-level synthesis scheduling heuristics
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Data path allocation using an extended binding model
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
A new area and shape function estimation technique for VLSI layouts
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
The system architect's workbench
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
MAHA: a program for datapath synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Estimating Lower-Bound Performance of Schedules Using a Relaxation Technique
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Cathedral-II: A Silicon Compiler for Digital Signal Processing
IEEE Design & Test
Share with care: a quantitative evaluation of sharing approaches in high-level synthesis
Proceedings of the Conference on Design, Automation and Test in Europe
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In this paper we present an optimal and a heuristic approach to solve the binding problem which occurs in high-level synthesis of digital systems. The optimal approach is based on an integer linear programming formulation. Given that such an approach is not practical for large problems, we then derive a heuristic from the ILP formulation which produces very good solutions in order of seconds. The heuristic is based on a network flow model and also considers floorplanning during the design process to minimize the interconnection area.