Architecture-Based Performance Analysis Applied to a Telecommunication System
IEEE Transactions on Software Engineering
StreamIt: A Language for Streaming Applications
CC '02 Proceedings of the 11th International Conference on Compiler Construction
MAST: Modeling and Analysis Suite for Real Time Applications
ECRTS '01 Proceedings of the 13th Euromicro Conference on Real-Time Systems
Workload Characterization Model for Tasks with Variable Execution Demand
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Model-Based Performance Prediction in Software Development: A Survey
IEEE Transactions on Software Engineering
A General Framework for Analysing System Properties in Platform-Based Embedded System Designs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
MPARM: Exploring the Multi-Processor SoC Design Space with SystemC
Journal of VLSI Signal Processing Systems
A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels
IEEE Transactions on Computers
Optimal TDMA time slot and cycle length allocation for hard real-time systems
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Interface-Based Design of Real-Time Systems with Hierarchical Scheduling
RTAS '06 Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium
Combining simulation and formal methods for system-level performance analysis
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Formal performance analysis and simulation of UML/SysML models for ESL design
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Introduction to the cell multiprocessor
IBM Journal of Research and Development - POWER5 and packaging
UML-based multiprocessor SoC design framework
ACM Transactions on Embedded Computing Systems (TECS)
A Platform-Based Taxonomy for ESL Design
IEEE Design & Test
SHAPES:: a tiled scalable software hardware architecture platform for embedded systems
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
System architecture evaluation using modular performance analysis: a case study
International Journal on Software Tools for Technology Transfer (STTT)
Mapping Applications to Tiled Multiprocessor Embedded Systems
ACSD '07 Proceedings of the Seventh International Conference on Application of Concurrency to System Design
Complex task activation schemes in system level performance analysis
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Toward the Predictable Integration of Real-Time COTS Based Systems
RTSS '07 Proceedings of the 28th IEEE International Real-Time Systems Symposium
The worst-case execution-time problem—overview of methods and survey of tools
ACM Transactions on Embedded Computing Systems (TECS)
Calibration of abstract performance models for system-level design space exploration
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
Cyclic dependencies in modular performance analysis
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
Modular performance analysis of cyclic dataflow graphs
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Electronic system-level synthesis methodologies
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Network calculus: a theory of deterministic queuing systems for the internet
Network calculus: a theory of deterministic queuing systems for the internet
Modeling structured event streams in system level performance analysis
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
From annotated software designs (UML SPT/MARTE) to model formalisms
SFM'07 Proceedings of the 7th international conference on Formal methods for performance evaluation
Generation and calibration of compositional performance analysis models for multi-processor systems
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
System-level performance analysis for designing on-chip communication architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Mapping of applications to MPSoCs
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Predictability for timing and temperature in multiprocessor system-on-chip platforms
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
System performance evaluation by combining RTC and VHDL simulation: A case study on NICs
Journal of Systems Architecture: the EUROMICRO Journal
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Modern real-time streaming applications are increasingly implemented on multiprocessor systems-on-chip (MPSoC). The implementation, as well as the verification of real-time applications executing on MPSoCs, are difficult tasks, however. A major challenge is the performance analysis of MPSoCs, which is required for early design space exploration and final system verification. Simulation-based methods are not well-suited for this purpose, due to long runtimes and non-exhaustive corner-case coverage. To overcome these limitations, formal performance analysis methods that provide guarantees for meeting real-time constraints have been developed. Embedding formal performance analysis into the MPSoC design cycle requires the generation of a faithful analysis model and its calibration with the system-specific parameters. In this article, a design flow that automates these steps is presented. In particular, we integrate modular performance analysis (MPA) into the distributed operation layer (DOL) MPSoC programming environment. The result is an MPSoC software design flow that allows for automatically generating the system implementation, together with an analysis model for system verification.