IEEE Transactions on Computers
Optimal clock skew scheduling tolerant to process variations
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Multi-Domain Clock Skew Scheduling
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ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
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Proceedings of the 2009 International Conference on Computer-Aided Design
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Proceedings of the 16th Asia and South Pacific Design Automation Conference
Optimal multi-domain clock skew scheduling
Proceedings of the 48th Design Automation Conference
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Conventional clock skew scheduling (CSS) for sequential circuits can be solved effectively using methods including the parametric shortest path algorithm and Howard's algorithm. Nevertheless, its application is practically limited due to the difficulties in reliably implementing a large set of arbitrary dedicated clock delays for flip-flops. Thus multi-domain clock skew scheduling (MDCSS) was proposed to tackle this by constraining the total number of clock delays. However, this new problem is hard to solve optimally in general. In this paper, we propose a novel method to efficiently solve it. Under mild restrictions, the problem is transformed into a special mixed integer linear programming problem, which can be solved optimally using similar techniques for the CSS problem. Then the solution quality is further improved by a critical-cycle-oriented refinement. As a result, our method obtains optimal solutions for 88 of the 93 tests on ISCAS89 benchmarks. The experimental results on large circuits in Opencores benchmarks also demonstrate its efficiency of at least one order faster than existing algorithms. To improve the runtime performance, we also devise a graph pruning algorithm that can be applied to methods for the MDCSS problem as a preprocessing step. Its application on our method shows a speedup of 2.66X on average.