Multi-level clustering for clock skew optimization

  • Authors:
  • Jonas Casanova;Jordi Cortadella

  • Affiliations:
  • Universitat Politècnica de Catalunya, Barcelona, Spain;Universitat Politècnica de Catalunya, Barcelona, Spain

  • Venue:
  • Proceedings of the 2009 International Conference on Computer-Aided Design
  • Year:
  • 2009

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Abstract

Clock skew scheduling has been effectively used to reduce the clock period of sequential circuits. However, this technique may become impractical if a different skew must be applied for each memory element. This paper presents a new technique for clock skew scheduling constrained by the number of skew domains. The technique is based on a multi-level clustering approach that progressively groups flip-flops with skew affinity. This new technique has been compared with previous work, showing the efficiency in the obtained performance and computational cost. As an example, the skews for an OpenSparc with almost 16K flip-flops and 500K paths have been calculated in less than 5 minutes when using only 2 to 5 skew domains.