Functional verification methodology for the PowerPC 604 microprocessor

A C-based RTL design verification methodology for complex microprocessor

DAC '97 Proceedings of the 34th annual Design Automation Conference

Virtual chip: making functional models work on real target systems

DAC '98 Proceedings of the 35th annual Design Automation Conference

Design reliability—estimation through statistical analysis of bug discovery data

DAC '98 Proceedings of the 35th annual Design Automation Conference

Fast prototyping: a system design flow for fast design, prototyping and efficient IP reuse

CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign

Functional verification methodology for microprocessors using the Genesys test-program generator

DATE '99 Proceedings of the conference on Design, automation and test in Europe

Fast prototyping: a system design flow applied to a complex system-on-chip multiprocessor design

Proceedings of the 36th annual ACM/IEEE Design Automation Conference

Automatic Vector Generation Using Constraints and Biasing

Journal of Electronic Testing: Theory and Applications - Special issue on microprocessor test and verification

A transaction-based unified simulation/emulation architecture for functional verification

Proceedings of the 38th annual Design Automation Conference

Postsilicon Validation Methodology for Microprocessors

IEEE Design & Test

Formal hardware specification languages for protocol compliance verification

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Validating the Itanium 2 Exception Control Unit: A Unit-Level Approach

IEEE Design & Test

A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication

Proceedings of the 41st annual Design Automation Conference

An automatic testbench generation tool for a SystemC functional verification methodology

SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design

Interactive presentation: Automatic generation of functional coverage models from behavioral verilog descriptions

Proceedings of the conference on Design, automation and test in Europe

Formal techniques for SystemC verification

Proceedings of the 44th annual Design Automation Conference

Automatic verification of external interrupt behaviors for microprocessor design

Proceedings of the 44th annual Design Automation Conference

Functional verification of an MPEG-4 decoder design using a random constrained movie generator

Proceedings of the 20th annual conference on Integrated circuits and systems design

An incremental learning framework for estimating signal controllability in unit-level verification

Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design

A transaction-based unified architecture for simulation and emulation

IEEE Transactions on Very Large Scale Integration (VLSI) Systems