ITEM: an iterative improvement test generation procedure for synchronous sequential circuits

  • Authors:
  • Irith Pomeranz;Sudhakar M. Reddy

  • Affiliations:
  • School of Electrical & Computer Eng., Purdue University, W. Lafayette, IN;Electrical & Computer Eng. Dept., University of Iowa, Iowa City, IA

  • Venue:
  • GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
  • Year:
  • 2001

Quantified Score

Hi-index 0.00

Visualization

Abstract