Computational geometry: an introduction
Computational geometry: an introduction
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
An O-tree representation of non-slicing floorplan and its applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
B*-Trees: a new representation for non-slicing floorplans
Proceedings of the 37th Annual Design Automation Conference
Block placement with symmetry constraints based on the O-tree non-slicing representation
Proceedings of the 37th Annual Design Automation Conference
FAST-SP: a fast algorithm for block placement based on sequence pair
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Analog Device-Level Layout Automation
Analog Device-Level Layout Automation
Corner block list: an effective and efficient topological representation of non-slicing floorplan
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Automation of IC layout with analog constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
VLSI module placement based on rectangle-packing by the sequence-pair
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Module packing based on the BSG-structure and IC layout applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Symmetry within the sequence-pair representation in the context of placement for analog design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Placement constraints in floorplan design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Placement with symmetry constraints for analog layout design using TCG-S
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Analog placement based on novel symmetry-island formulation
Proceedings of the 44th annual Design Automation Conference
Symmetry constraint based on mismatch analysis for analog layout in SOI technology
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
An improved particle swarm optimizer for placement constraints
Journal of Artificial Evolution and Applications - Particle Swarms: The Second Decade
Analog placement based on hierarchical module clustering
Proceedings of the 45th annual Design Automation Conference
Analog placement based on symmetry-island formulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Placement constraints and macrocell overlap removal using particle swarm optimization
ANTS'06 Proceedings of the 5th international conference on Ant Colony Optimization and Swarm Intelligence
Practical placement and routing techniques for analog circuit designs
Proceedings of the International Conference on Computer-Aided Design
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The traditional way of approaching devicelevel placement problems for analog layout is to explore a huge search space of absolute placement representations, where cells are allowed to illegally overlap during their moves [2, 7, 8]. This paper presents a novel analog placement technique operating on the set of binary tree representations of the layout [3], where the typical presence of an arbitrary number of symmetry groups of devices is directly taken into account during the exploration of the solution space. The efficiency of the novel approach is due to a data structure called segment tree, mainly used in computational geometry.