DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Redundant operator creation: a scheduling optimization technique
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Partitioning by regularity extraction
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
SYNTEST: an environment for system-level design for test
EURO-DAC '92 Proceedings of the conference on European design automation
Genetic algorithms + data structures = evolution programs (2nd, extended ed.)
Genetic algorithms + data structures = evolution programs (2nd, extended ed.)
Computer
Area-efficient fault detection during self-recovering microarchitecture synthesis
DAC '94 Proceedings of the 31st annual Design Automation Conference
Sequential circuit test generation in a genetic algorithm framework
DAC '94 Proceedings of the 31st annual Design Automation Conference
Architectural partitioning of control memory for application specific programmable processors
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
High level synthesis for reconfigurable datapath structures
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Bridge: a versatile behavioral synthesis system
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
Optimizing power using transformations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Synthesis of reusable DSP cores based on multiple behaviors
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
A new optimization technique for improving resource exploitation and critical path minization
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Hierarchical test generation and design for testability of ASPPs and ASIPs
DAC '97 Proceedings of the 34th annual Design Automation Conference
Media architecture: general purpose vs. multiple application-specific programmable processor
DAC '98 Proceedings of the 35th annual Design Automation Conference
Synthesis of application specific instructions for embedded DSP software
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Synthesis of Application Specific Instructions for Embedded DSP Software
IEEE Transactions on Computers
Multiple behavior module synthesis based on selective groupings
Proceedings of the conference on Design, automation and test in Europe
Exploring Hypermedia Processor Design Space
Journal of VLSI Signal Processing Systems - Special issue on multimedia signal processing
Synthesis of custom processors based on extensible platforms
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
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This paper proposes an Evolution Programming Approach for behavior-level area-efficient design of ASPPs (Application Specific Programmable Processors). This approach, based on a given behavioral-level kernel, randomly transforms each of the input behaviors, then the behavioral kernel is used in the evolution process to guide the survival of data flow graphs (DFGs). Finally, instead of the given DFGs, the surviving DFGs are used to synthesize a programmable architecture. This leads to an area-efficient design for all the input behaviors. Experimental results indicate this approach is encouraging.