Force-directed scheduling in automatic data path synthesis
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Automated datapath synthesis: A compilation approach
Microprocessing and Microprogramming
Splicer: a heuristic approach to connectivity binding
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Module selection for pipelined synthesis
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
HAL: a multi-paradigm approach to automatic data path synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Sehwa: a program for synthesis of pipelines
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
MAHA: a program for datapath synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
The effect of register-transfer design tradeoffs on chip area and performance
DAC '83 Proceedings of the 20th Design Automation Conference
The mimola design system: Tools for the design of digital processors
DAC '84 Proceedings of the 21st Design Automation Conference
ISIS: a system for performance driven resource sharing
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
System clock estimation based on clock slack minimization
EURO-DAC '92 Proceedings of the conference on European design automation
Design exploration for high-performance pipelines
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
GSA: scheduling and allocation using genetic algorithm
EURO-DAC '94 Proceedings of the conference on European design automation
Register allocation and binding for low power
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Generating several solutions for the scheduling problem in high-level synthesis
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
An optimal clock period selection method based on slack minimization criteria
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Matching system and component behaviour in MIMOLA synthesis tools
EURO-DAC '90 Proceedings of the conference on European design automation
High level synthesis: a data path partitioning method dedicated to speed enhancement
EURO-DAC '91 Proceedings of the conference on European design automation
Processor Description Languages
Processor Description Languages
EUC'07 Proceedings of the 2007 conference on Emerging direction in embedded and ubiquitous computing
Coordinated resource optimization in behavioral synthesis
Proceedings of the Conference on Design, Automation and Test in Europe
Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
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Synthesis of digital systems, involves a number of tasks ranging from scheduling to generating interconnections. The interrelationship between these tasks implies that good designs can only be generated by considering the overall impact of a design decision. The approach presented in this paper provides a framework for integrating scheduling decisions with binding decisions. The methodology supports allocation of a wider mix of operator modules and covers the design space more effectively. The process itself can be described as incremental synthesis and is thus well-suited for applications involving partial pre-synthesized structures.