Test generation systems in Japan
DAC '75 Proceedings of the 12th Design Automation Conference
A logic design structure for LSI testability
DAC '77 Proceedings of the 14th Design Automation Conference
Test generation for large logic networks
DAC '77 Proceedings of the 14th Design Automation Conference
Checkpoint Faults are not Sufficient Target Faults for Test Generation
IEEE Transactions on Computers
Critical path tracing - an alternative to fault simulation
25 years of DAC Papers on Twenty-five years of electronic design automation
Circuit partitioning for efficient logic BIST synthesis
Proceedings of the conference on Design, automation and test in Europe
Fault detection of MOS combinatorial networks
ACM SIGDA Newsletter
IEEE Design & Test
Critical path tracing - an alternative to fault simulation
DAC '83 Proceedings of the 20th Design Automation Conference
Design automation status in Japan
DAC '81 Proceedings of the 18th Design Automation Conference
DAC '82 Proceedings of the 19th Design Automation Conference
Testing of MOS combinational networks a procedure for efficient fault simulation and test generation
DAC '79 Proceedings of the 16th Design Automation Conference
Behavioral-level test development
DAC '79 Proceedings of the 16th Design Automation Conference
Fault Diagnosis of MOS Combinational Networks
IEEE Transactions on Computers
An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits
IEEE Transactions on Computers
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