PASSAT: Efficient SAT-Based Test Pattern Generation for Industrial Circuits

  • Authors:
  • Junhao Shi;Gorschwin Fey;Rolf Drechsler;Andreas Glowatz;Friedrich Hapke;Jurgen Schloffel

  • Affiliations:
  • University of Bremen and Philips Semiconductors GmbH;University of Bremen and Philips Semiconductors GmbH;University of Bremen and Philips Semiconductors GmbH;University of Bremen and Philips Semiconductors GmbH;University of Bremen and Philips Semiconductors GmbH;University of Bremen and Philips Semiconductors GmbH

  • Venue:
  • ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
  • Year:
  • 2005

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Abstract

Automatic Test Pattern Generation (ATPG) based on Boolean Satisfiability (SAT) has been proposed as an alternative to classical search algorithms. SAT-based ATPG turned out to be more robust and more effective by formulating the problem as a set of equations. In this paper we present an efficient ATPG algorithm that makes use of powerful SAT-solving techniques. Problem specific heuristics are applied to guide the search. In contrast to previous SAT-based algorithms, the new approach can also cope with tri-states. The algorithm has been implemented as the tool PASSAT. Experimental results on large industrial circuits are given to demonstrate the quality and efficiency of the algorithm.