ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Reducing leakage in power-saving capable caches for embedded systems by using a filter cache
MEDEA '07 Proceedings of the 2007 workshop on MEmory performance: DEaling with Applications, systems and architecture
Facelift: Hiding and slowing down aging in multicores
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Adaptive Debug and Diagnosis Without Fault Dictionaries
Journal of Electronic Testing: Theory and Applications
The BubbleWrap many-core: popping cores for sequential acceleration
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
How to consider shorts and guarantee yield rate improvement for redundant wire insertion
Proceedings of the 2009 International Conference on Computer-Aided Design
The next generation challenge for software defined radio
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
IVF: characterizing the vulnerability of microprocessor structures to intermittent faults
Proceedings of the Conference on Design, Automation and Test in Europe
Optimized self-tuning for circuit aging
Proceedings of the Conference on Design, Automation and Test in Europe
Programmable aging sensor for automotive safety-critical applications
Proceedings of the Conference on Design, Automation and Test in Europe
On-chip aging sensor circuits for reliable nanometer MOSFET digital circuits
IEEE Transactions on Circuits and Systems II: Express Briefs
A distributed and topology-agnostic approach for on-line NoC testing
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
In-field aging measurement and calibration for power-performance optimization
Proceedings of the 48th Design Automation Conference
Delay sensing for long-term variations and defects monitoring in safety---critical applications
Analog Integrated Circuits and Signal Processing
NBTI mitigation in microprocessor designs
Proceedings of the great lakes symposium on VLSI
Representative critical reliability paths for low-cost and accurate on-chip aging evaluation
Proceedings of the International Conference on Computer-Aided Design
Lifetime reliability assessment with aging information from low-level sensors
Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
Reliability analysis reloaded: how will we survive?
Proceedings of the Conference on Design, Automation and Test in Europe
IVF: characterizing the vulnerability of microprocessor structures to intermittent faults
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Methods for fault tolerance in networks-on-chip
ACM Computing Surveys (CSUR)
Aging-aware hardware-software task partitioning for reliable reconfigurable multiprocessor systems
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
A Comprehensive Framework for Counterfeit Defect Coverage Analysis and Detection Assessment
Journal of Electronic Testing: Theory and Applications
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Scaling, for enhanced performance and cost reduction, has pushed existing CMOS materials much closer to their intrinsic reliability limits.This will require that designers will have to be very careful with: high current densities,voltage overshoots, localized hot spots on the chip, high duty-cycle applications, and high thermal-resistance packaging.In addition to the reliability issues, interconnect RC time-delay will worsen with scaling because Cu resistivity is expected to increase due to surface and grain boundary scattering in very narrow interconnects.Also, the low-k interconnect-dielectric introduction rate has been much slower than ITRS roadmap forecasts.