An integer-linear-programming-based routing algorithm for flip-chip designs

Authors:
Jia-Wei Fang;Chin-Hsiung Hsu;Yao-Wen Chang
Affiliations:
Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan;Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan;Department of Electrical Engineering and Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan
Venue:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Year:
2009

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Abstract

The flip-chip package provides a high chip-density solution to the demand for more input-output pads of very large scale integration designs. In this paper, we present the first routing algorithm in the literature for the preassignment flip-chip routing problem with a predefined netlist among pads and wire-width and signal-skew considerations. Our algorithm is based on integer linear programming (ILP) and guarantees to find an optimal solution for the addressed problem. It adopts a two-stage technique of global routing followed by detailed routing. In global routing, it first uses three reduction techniques to prune redundant solutions and create a global-routing path for each net. Without loss of the solution optimality, our reduction techniques can further prune the ILP variables (constraints) by 85.5% (98.0%) on average over a recent reduction technique. The detailed routing applies passing-point assignment, net-ordering determination, and X-based gridless routing to complete the routing. Experimental results based on five real industry designs show that our router can achieve 100% routability and the optimal global-routing wire-length, and satisfy all signal-skew constraints, under reasonable central-processing-unit times, whereas recent related work has resulted in much inferior solution quality.