A methodology for constraint-driven synthesis of on-chip communications

Authors:
Alessandro Pinto;Luca P. Carloni;Alberto L. Sangiovanni-Vincentelli
Affiliations:
United Technologies Research Center, East Hartford, CT;Department of Computer Science, Columbia University, New York, NY;Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA
Venue:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Year:
2009

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Abstract

We present a methodology and an optimization framework for the synthesis of on-chip communication through the assembly of components such as interfaces, routers, buses, and links, from a target library. Models for functionality, cost, and performance of each element are captured in the library together with their composition rules. We develop a mathematical framework to model communication at different levels of abstraction from the point-to-point input specification to the library elements and the final implementation.