RF microelectronics
Complete Wireless Design
End-to-End Test Strategy for Wireless Systems
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
A Bulti-in Self-Test Strategy for Wireless Communication Systems
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Early Capture for Boundary Scan Timing Measurements
Proceedings of the IEEE International Test Conference on Test and Design Validity
A high speed and area efficient on-chip analog waveform extractor
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Testability implications in low-cost integrated radio transceivers: a Bluetooth case study
Proceedings of the IEEE International Test Conference 2001
Test Generation for Accurate Prediction of Analog Specifications
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
A Signature Test Framework for Rapid Production Testing of RF Circuits
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Feature Extraction Based Built-In Alternate Test of RF Components Using a Noise Reference
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
RF-BIST: Loopback Spectral Signature Analysis
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Journal of Electronic Testing: Theory and Applications
Low-Cost Alternate EVM Test for Wireless Receiver Systems
VTS '05 Proceedings of the 23rd IEEE Symposium on VLSI Test
Low-cost Production Test of BER for Wireless Receivers
ATS '05 Proceedings of the 14th Asian Test Symposium on Asian Test Symposium
Low-Cost Production Testing of Wireless Transmitters
VLSID '06 Proceedings of the 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design
Iterative built-in testing and tuning of mixed-signal/RF systems
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
DSP-driven self-tuning of RF circuits for process-induced performance variability
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper presents an efficient system-level manufacturing test methodology for wireless transceiver systems. Conventional system-level testing procedures incur large test times and require the use of multiple test hardware configurations for measuring frequency and modulation-domain performance specifications, e.g., system-gain, nonlinearity, noise-figure, channel power, adjacent-channel power-ratio, error vector magnitude, modulation signal-to-noise ratio and bit error rate. The proposed test methodology addresses these problems by simplifying the test stimulus application and test response capture/analysis procedures. In addition, the number of test hardware configurations needed to measure all the performance specifications is minimized and fewer as well as shorter tests are used to determine all the test specification values of interest. Test accuracy is achieved by optimizing the test stimulus so that the observed response has strong statistical correlation with the target test specification values. Experimental results show significant testing time reduction and was validated on 1.575 GHz and 900 MHz wireless transceiver prototypes.