Can recursive bisection alone produce routable placements?
Proceedings of the 37th Annual Design Automation Conference
FAR: fixed-points addition & relaxation based placement
Proceedings of the 2002 international symposium on Physical design
Iterative Methods for Sparse Linear Systems
Iterative Methods for Sparse Linear Systems
Capo: robust and scalable open-source min-cut floorplacer
Proceedings of the 2005 international symposium on Physical design
Exploring the cache design space for large scale CMPs
ACM SIGARCH Computer Architecture News - Special issue: dasCMP'05
mPL6: enhanced multilevel mixed-size placement
Proceedings of the 2006 international symposium on Physical design
A faster implementation of APlace
Proceedings of the 2006 international symposium on Physical design
An efficient and effective detailed placement algorithm
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
RQL: global placement via relaxed quadratic spreading and linearization
Proceedings of the 44th annual Design Automation Conference
FastPlace 3.0: A Fast Multilevel Quadratic Placement Algorithm with Placement Congestion Control
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Understanding the Performance of Sparse Matrix-Vector Multiplication
PDP '08 Proceedings of the 16th Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP 2008)
Modern Circuit Placement: Best Practices and Results
Modern Circuit Placement: Best Practices and Results
The Design of Competitive Online Algorithms via a Primal-Dual Approach
The Design of Competitive Online Algorithms via a Primal-Dual Approach
A fast hierarchical quadratic placement algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fast floorplanning by look-ahead enabled recursive bipartitioning
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Force-Directed Methods for Generic Placement
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ECO-System: Embracing the Change in Placement
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Kraftwerk2—A Fast Force-Directed Quadratic Placement Approach Using an Accurate Net Model
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
BonnPlace: Placement of Leading-Edge Chips by Advanced Combinatorial Algorithms
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Obstacle-aware clock-tree shaping during placement
Proceedings of the 2011 international symposium on Physical design
The ISPD-2011 routability-driven placement contest and benchmark suite
Proceedings of the 2011 international symposium on Physical design
A SimPLR method for routability-driven placement
Proceedings of the International Conference on Computer-Aided Design
Ripple: an effective routability-driven placer by iterative cell movement
Proceedings of the International Conference on Computer-Aided Design
A fast discrete placement algorithm for FPGAs
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Keep it straight: teaching placement how to better handle designs with datapaths
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
Scalable hierarchical floorplanning for fast physical prototyping of systems-on-chip
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
A size scaling approach for mixed-size placement
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
Proceedings of the 49th Annual Design Automation Conference
Progress and challenges in VLSI placement research
Proceedings of the International Conference on Computer-Aided Design
Case study for placement solutions in ispd11 and dac12 routability-driven placement contests
Proceedings of the 2013 ACM international symposium on International symposium on physical design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
POLAR: placement based on novel rough legalization and refinement
Proceedings of the International Conference on Computer-Aided Design
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We propose a self-contained, flat, force-directed algorithm for global placement that is simpler than existing placers and easier to integrate into timing-closure flows. It maintains lower-bound and upper-bound placements that converge to a final solution. The upper-bound placement is produced by a novel rough legalization algorithm. Our placer SimPL outperforms mPL6, NTUPlace3, FastPlace3, APlace2 and Capo simultaneously in runtime and solution quality, running 6.4 times faster than mPL6 and reducing wirelength by 2% on the ISPD 2005 benchmark suite.