Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Communications of the ACM
A comparison of CMOS implementations of an asynchronous circuits primitive: the C-element
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Microprocessor Architectures: From VLIW to Tta
Microprocessor Architectures: From VLIW to Tta
Design of New DSP Instructions and Their Hardware Architecture for High-Speed FFT
Journal of VLSI Signal Processing Systems
Computer
AMULET2e: An Asynchronous Embedded Controller
ASYNC '97 Proceedings of the 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems
AMULET3i - An Asynchronous System-on-Chip
ASYNC '00 Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems
ASIP Design Methodologies: Survey and Issues
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
AMULET3: A 100 MIPS Asynchronous Embedded Processor
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Energy-aware architectures for a real-valued FFT implementation
Proceedings of the 2003 international symposium on Low power electronics and design
Low-power asynchronous viterbi decoder for wireless applications
Proceedings of the 2004 international symposium on Low power electronics and design
Scalable FFT Processors and Pipelined Butterfly Units
Journal of VLSI Signal Processing Systems
Novel design of multiplier-less FFT processors
Signal Processing
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Using Transport Triggered Architectures for Embedded Processor Design
Integrated Computer-Aided Engineering
Low-power, high-performance TTA processor for 1024-point fast fourier transform
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
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Low-power design became crucial with the widespread use of the embedded systems, where a small battery has to last for a long period. The embedded processors need to efficient in order to achieve real-time requirements with low power consumption for specific algorithms. Transport Triggered Architecture (TTA) offers a cost-effective trade-off between the size and performance of ASICs and the programmability of general-purpose processors. The main advantages of TTA are its simplicity and flexibility. In TTAprocessors, the special function units (SFUs) can be utilized to increase performance or reduce power dissipation. This paper presents a low-power globally synchronous locally asynchronous TTA processor using both asynchronous function units and synchronous function units. We solve the problem that use asynchronous circuits in TTA framework, which is a synchronous design environment. This processor is customized for a 1024-point FFT application. Compared to other reported implementations with reasonable performance. our design shows a significant improvement in energy-efficiency.