Design for manufacturability and yield
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
DTR: a defect-tolerant routing algorithm
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Introduction to algorithms
Cost of silicon viewed from VLSI design perspective
DAC '94 Proceedings of the 31st annual Design Automation Conference
Design for manufacturability in submicron domain
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Developing a concurrent methodology for standard-cell library generation
DAC '97 Proceedings of the 34th annual Design Automation Conference
A VLSI artwork legalization technique based on a new criterion of minimum layout perturbation
Proceedings of the 1997 international symposium on Physical design
Layout compaction for yield optimization via critical area minimization
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Should Yield be a Design Objective?
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Timing-driven cell layout de-compaction for yield optimization by critical area minimization
Proceedings of the conference on Design, automation and test in Europe: Proceedings
TROY: track router with yield-driven wire planning
Proceedings of the 44th annual Design Automation Conference
Timing-aware cell layout de-compaction for yield optimization by critical area minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Lithography-aware layout compaction
Proceedings of the great lakes symposium on VLSI
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