Arithmetic Additive Generators of Pseudo-Exhaustive Test Patterns
IEEE Transactions on Computers
STARBIST: scan autocorrelated random pattern generation
DAC '97 Proceedings of the 34th annual Design Automation Conference
Built-in test generation for synchronous sequential circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
IDDQ and AC Scan: The War Against Unmodelled Defects
Proceedings of the IEEE International Test Conference on Test and Design Validity
Scan-Encoded Test Pattern Generation for BIST
Proceedings of the IEEE International Test Conference
A Learning-Based Method to Match a Test Pattern Generator to a Circuit-Under-Test
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Sequential Circuit Test Generation Using Dynamic State Traversal
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Random pattern testing for sequential circuits revisited
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
19.1 Built-In Self Testing of Sequential Circuits Using Precomputed Test Sets
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Best Methods for At-Speed Testing?
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Vector restoration based static compaction of test sequences for synchronous sequential circuits
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
Built-in generation of weighted test sequences for synchronous sequential circuits
DATE '00 Proceedings of the conference on Design, automation and test in Europe
On the Use of Fully Specified Initial States for Testing of Synchronous Sequential Circuits
IEEE Transactions on Computers
ETW '00 Proceedings of the IEEE European Test Workshop
A Partitioning and Storage Based Built-In Test Pattern Generation Method for Scan Circuits
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
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