Handbook of theoretical computer science (vol. B)
Verification of large synthesized designs
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Verification of VHDL designs using VAL
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Symbolic Model Checking
A Calculus of Communicating Systems
A Calculus of Communicating Systems
Formal Hardware Verification - Methods and Systems in Comparison
Formal Hardware Verification - Methods and Systems in Comparison
Checking formal specifications under simulation
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
A visual approach to validating system level designs
Proceedings of the 15th international symposium on System Synthesis
Functional Coverage Metric Generation from Temporal Event Relation Graph
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Systematic functional coverage metric synthesis from hierarchical temporal event relation graph
Proceedings of the 41st annual Design Automation Conference
Cross-Product Functional Coverage Measurement with Temporal Properties-Based Assertions
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Incorporating Ef.cient Assertion Checkers into Hardware Emulation
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
BDD-based verification of scalable designs
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
Formal verification of systemc designs using a petri-net based representation
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Fast falsification based on symbolic bounded property checking
Proceedings of the 43rd annual Design Automation Conference
Proceedings of the conference on Design, automation and test in Europe
System on Chips optimization using ABV and automatic generation of SystemC codes
Microprocessors & Microsystems
Verification of temporal properties in automotive embedded software
Proceedings of the conference on Design, automation and test in Europe
An automatic ABV methodology enabling PSL assertions across SLD flow for SOCs modeled in SystemC
Computers and Electrical Engineering
Distributed Symbolic Bounded Property Checking
Electronic Notes in Theoretical Computer Science (ENTCS)
Simulation-based verification of the MOST NetInterface specification revision 3.0
Proceedings of the Conference on Design, Automation and Test in Europe
Towards assertion-based verification of heterogeneous system designs
Proceedings of the Conference on Design, Automation and Test in Europe
Efficient monitoring of ω-languages
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
An asymptotically correct finite path semantics for LTL
LPAR'12 Proceedings of the 18th international conference on Logic for Programming, Artificial Intelligence, and Reasoning
Hi-index | 0.00 |