A linear-time heuristic for improving network partitions
25 years of DAC Papers on Twenty-five years of electronic design automation
A parallel bottom-up clustering algorithm with applications to circuit partitioning in VLSI design
DAC '93 Proceedings of the 30th international Design Automation Conference
A general framework for vertex orderings, with applications to netlist clustering
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Recent directions in netlist partitioning: a survey
Integration, the VLSI Journal
Efficient and effective placement for very large circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
A new approach to effective circuit clustering
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Can recursive bisection alone produce routable placements?
Proceedings of the 37th Annual Design Automation Conference
Edge separability based circuit clustering with application to circuit partitioning
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Efficient circuit clustering for area and power reduction in FPGAs
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
Physical hierarchy generation with routing congestion control
Proceedings of the 2002 international symposium on Physical design
When clusters meet partitions: new density-based methods for circuit decomposition
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Clustering and linear placement
DAC '72 Proceedings of the 9th Design Automation Workshop
An evaluation of bipartitioning techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Wire length prediction in constraint driven placement
Proceedings of the 2003 international workshop on System-level interconnect prediction
Synthesis and placement flow for gain-based programmable regular fabrics
Proceedings of the 2003 international symposium on Physical design
Wire length prediction based clustering and its application in placement
Proceedings of the 40th annual Design Automation Conference
Proceedings of the 2004 international symposium on Physical design
A study of netlist structure and placement efficiency
Proceedings of the 2004 international symposium on Physical design
Pre-layout wire length and congestion estimation
Proceedings of the 41st annual Design Automation Conference
Large-Scale Circuit Placement: Gap and Promise
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Individual wire-length prediction with application to timing-driven placement
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Wire length prediction-based technology mapping and fanout optimization
Proceedings of the 2005 international symposium on Physical design
Net cluster: a net-reduction based clustering preprocessing algorithm
Proceedings of the 2006 international symposium on Physical design
An effective clustering algorithm for mixed-size placement
Proceedings of the 2007 international symposium on Physical design
A pre-placement net length estimation technique for mixed-size circuits
Proceedings of the 11th international workshop on System level interconnect prediction
A study of routability estimation and clustering in placement
Proceedings of the 2009 International Conference on Computer-Aided Design
A pre-placement individual net length estimation model and an application for modern circuits
Integration, the VLSI Journal
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In this paper we present a linear-time Fine Granularity Clustering (FGC) algorithm to reduce the size of large scale placement problems. FGC absorbs as many nets as possible into Fine Clusters. The absorbed nets are expected to be short in any good placement; therefore the clustering process does not affect the quality of results. We compare FGC with a connectivity-based clustering algorithm proposed in [1] and simulated-annealing-based algorithm in TimberWolf [2], both of which also reduce the number of external nets between clusters. The experimental results show that our algorithm achieves better net absorption than the previous approaches while using much less CPU time for large scale problems. With our FGC algorithm, we propose a Fast Placer Implementation (FPI) framework, which combines our FGC-based size reduction with traditional placement techniques to handle large-scale placement problems. We compared FPI placement results with a public-domain fast standard cell placer Capo[4] on large scale benchmarks. The results show that FPI can reduce CPU time for large scale placement by a factor of 3~5x while obtaining place驴ment results of comparable or better quality.