An Experimental Chip to Evaluate Test Techniques: Experiment Results
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
IC Failure Analysis Tools and Techniques - Macig, Mystery, and Science
Proceedings of the IEEE International Test Conference on Test and Design Validity
IDDQ and AC Scan: The War Against Unmodelled Defects
Proceedings of the IEEE International Test Conference on Test and Design Validity
An Overview of CMOS VLSI Failure Analysis and the Importance of Test and Diagnostics
Proceedings of the IEEE International Test Conference on Test and Design Validity
So What Is an Optimal Test Mix? A Discussion of the SEMATECH Methods Experiment
Proceedings of the IEEE International Test Conference
Application and Analysis of IDDQ Diagnostic Software
Proceedings of the IEEE International Test Conference
Current Signatures: Application
Proceedings of the IEEE International Test Conference
Signature Analysis for IC Diagnosis and Failure Analysis
Proceedings of the IEEE International Test Conference
The Effectiveness of IDDQ, Functional and Scan Tests: How Many Fault Coverages Do We Need?
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Very-Low-Voltage Testing for Weak CMOS Logic ICs
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
A logic design structure for LSI testability
DAC '77 Proceedings of the 14th Design Automation Conference
Current signatures [VLSI circuit testing]
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Current signatures for integrated circuit test strategy advisor
Current signatures for integrated circuit test strategy advisor
Defect classes - an overdue paradigm for CMOS IC testing
ITC'94 Proceedings of the 1994 international conference on Test
Extraction and simulation of realistic CMOS faults using inductive fault analysis
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
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SEMATECH has sponsored a "Test Method Evaluation"study to understand the trade-offs among the most commontest methodologies used in the industry [1,2]. This paper presentsthe results of the failure analysis portion of thatproject. The testing, reliability stressing, characterization,fault diagnosis and physical analysis results are presentedfor 25 devices including "IDDq-only" failures and "delaytest-only" failures.