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Proceedings of the 42nd annual Design Automation Conference
Flexible ASIC: shared masking for multiple media processors
Proceedings of the 42nd annual Design Automation Conference
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Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Buffering global interconnects in structured ASIC design
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
A methodology for FPGA to structured-ASIC synthesis and verification
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Buffering global interconnects in structured ASIC design
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Via configurable three-input lookup-tables for structured ASICs
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Power gating design for standard-cell-like structured ASICs
Proceedings of the Conference on Design, Automation and Test in Europe
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Proceedings of the 49th Annual Design Automation Conference
Microprocessors & Microsystems
Standard cell like via-configurable logic blocks for structured ASIC in an industrial design flow
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Architecture and design flow for a highly efficient structured ASIC
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design and analysis of via-configurable routing fabrics for structured ASICs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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A regular fabric design methodology for applications requiring specific layout-level design rules
Microelectronics Journal
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This paper describes the structured ASIC technology and impacts to the implementation flow. With an optimized and programmable structure, the structured ASIC technology indeed introduces a dramatically reduce ASIC cost and manufacturing turn-around time. While, the structured ASIC implementation flow is more complex than the conventional cell-based flow. There would be slightly impacts to structured ASIC implementation problems. Finally, the structured ASIC solutions provided by Faraday would be given. There are 3 structured ASIC solutions for customers' different applications. The three solutions are MPCA (Metal programmable Cell Array), MPIO (Metal Programmable I/O), and the structured ASIC platform. With the most competitive architecture, our customers can implement their ASIC at a lower cost with a faster turn-around-time.