Estimating routing congestion using probabilistic analysis
Proceedings of the 2001 international symposium on Physical design
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Accurate pseudo-constructive wirelength and congestion estimation
Proceedings of the 2003 international workshop on System-level interconnect prediction
Improved global routing through congestion estimation
Proceedings of the 40th annual Design Automation Conference
Probabilistic congestion prediction
Proceedings of the 2004 international symposium on Physical design
Congestion prediction in early stages
Proceedings of the 2005 international workshop on System level interconnect prediction
Is probabilistic congestion estimation worthwhile?
Proceedings of the 2005 international workshop on System level interconnect prediction
Fast and accurate rectilinear steiner minimal tree algorithm for VLSI design
Proceedings of the 2005 international symposium on Physical design
FLUTE: fast lookup table based wirelength estimation technique
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Highly scalable algorithms for rectilinear and octilinear Steiner trees
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
BoxRouter: a new global router based on box expansion and progressive ILP
Proceedings of the 43rd annual Design Automation Conference
Efficient obstacle-avoiding rectilinear steiner tree construction
Proceedings of the 2007 international symposium on Physical design
FastRoute: a step to integrate global routing into placement
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Probabilistic Congestion Prediction with Partial Blockages
ISQED '07 Proceedings of the 8th International Symposium on Quality Electronic Design
IPR: an integrated placement and routing algorithm
Proceedings of the 44th annual Design Automation Conference
FastRoute 2.0: A High-quality and Efficient Global Router
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
DpRouter: A Fast and Accurate Dynamic-Pattern-Based Global Routing Algorithm
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
A global router with a theoretical bound on the optimal solution
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Global routing by new approximation algorithms for multicommodity flow
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Pattern routing: use and theory for increasing predictability and avoiding coupling
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
The coming of age of (academic) global routing
Proceedings of the 2008 international symposium on Physical design
Congestion prediction in early stages of physical design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
NTHU-Route 2.0: a fast and stable global router
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
FastRoute3.0: a fast and high quality global router based on virtual capacity
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Multi-layer global routing considering via and wire capacities
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
FastRoute 4.0: global router with efficient via minimization
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
High-performance global routing with fast overflow reduction
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Robust layer assignment for via optimization in multi-layer global routing
Proceedings of the 2009 international symposium on Physical design
GRIP: scalable 3D global routing using integer programming
Proceedings of the 46th Annual Design Automation Conference
Archer: a history-based global routing algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Multilayer global routing with via and wire capacity considerations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Multi-threaded collision-aware global routing with bounded-length maze routing
Proceedings of the 47th Design Automation Conference
Efficient congestion mitigation using congestion-aware steiner trees and network coding topologies
VLSI Design - Special issue on CAD for Gigascale SoC Design and Verification Solutions
High-quality global routing for multiple dynamic supply voltage designs
Proceedings of the International Conference on Computer-Aided Design
An auction based pre-processing technique to determine detour in global routing
Proceedings of the International Conference on Computer-Aided Design
Optimizing the antenna area and separators in layer assignment of multi-layer global routing
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
A fast maze-free routing congestion estimator with hybrid unilateral monotonic routing
Proceedings of the International Conference on Computer-Aided Design
Routability optimization for crossbar-switch structured ASIC design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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In this paper, we present MAIZEROUTER, winner of the inaugural Global Routing Contest hosted at ISPD 2007. MAIZEROUTER reflects a significant leap in progress over existing publicly-available routing tools, and abandons popular algorithms such as multicommodity flow-based techniques, ILP formulations, and congestion-driven Steiner tree generation. Instead, the foundation of our algorithm draws upon simple yet powerful edge-based operations, including extreme edge shifting, a technique aimed primarily at the efficient reduction of routing congestion, and edge retraction, a counterpart to extreme edge shifting that serves to reduce unnecessary wirelength. These algorithmic contributions are built upon a framework of interdependent net decomposition, a representation that improves upon traditional two-pin net decomposition by preventing duplication of routing resources while enabling cheap and incremental topological reconstruction. A maintenance mechanism, named garbage collection, is introduced to eliminate leftover routing segments. Collectively, these operations permit a broad search space that previous algorithms have been unable to achieve, resulting in solutions of considerably higher quality than those of well-established routers.